Joern received his BSEE and MSEE from the Technical University Hamburg-Harburg in Hamburg, Germany, majoring in Telecommunications. For his master thesis, he developed a cubic-spline video scaling algorithm implemented on an Altera Cyclone FPGA - during a time when embedded graphics processing was only available to Tier 1 product development companies.
Joern joined Synapse in early 2016. Before then, he has been working for hardware companies in the professional audio industry, releasing a number of consumer and prosumer embedded hardware products. In doing so, he has gathered a broad range of experience in hardware architecture, digital and analog hardware design, design for EMI and ESD, digital signal processing, FPGA and firmware design, as well as mass production in Asia.
Joern enjoys architecting and developing FPGA designs, which became his passion while still at university. Outside of work, he is working on increasing his golfing skills, and enjoys experimenting in the kitchen - as long as somebody else is in charge of cleaning up afterwards.